Electronics, Vol. 14, Pages 3736: Design and Analysis of Compact K/Ka-Band CMOS Four-Way Power Splitters for K/Ka-Band LEO Satellite Communications and 28/39 GHz 5G NR

Electronics doi: 10.3390/electronics14183736

Authors:
Yo-Sheng Lin
Chin-Yi Huang

We present the design and analysis of three CMOS 4-way power splitters operating in the K/Ka-band (18–27 GHz/27–40 GHz) for low Earth orbit (LEO) satellite communications and 26.5–29.5/37–40 GHz 5G radio applications. The first power splitter (PS1) consists of a two-way power splitter using circular double-helical transmission lines (DH-TLs) cascaded with two two-way power splitters using noninverting circular sole-helical coupled-TL (SH-CL). The second power splitter (PS2) consists of a two-way power splitter using circular DH-TLs cascaded with two two-way power splitters using inverting circular SH-CL. The third power splitter (PS3) consists of three two-way power splitters using DH-TLs. For each two-way power splitter, a parallel input capacitor is included to satisfy the requirement for two equivalent quarter-wavelength (λ/4) TLs, ensuring a low input reflection coefficient. λ/10-DH-TL-based-double-λ/4-TLs, λ/12-noninverting-SH-CL-based-double-λ/4-TLs, and λ/9-inverting-SH-CL-based-double-λ/4-TLs are utilized to attain compact chip size and low amplitude inequality (AI) and phase deviation (PD). Prominent results are attained. For instance, the chip size of PS1 is 0.057 mm2. At 33 GHz, PS1 attains S11 of −16 dB, S22 of −21.2 dB, S33 of −19.7 dB, S23 of −15.3 dB, S21 of −7.862 dB, S31 of −7.803 dB, AI23 of −0.059 dB, and PD23 of 0.197°. The chip size of PS2 is 0.071 mm2. At 33 GHz, PS2 attains S11 of −13.5 dB, S22 of −16.1 dB, S33 of −16.7 dB, S23 of −34.8 dB, S21 of −8.1 dB, S31 of −8.146 dB, AI23 of 0.046 dB, and PD23 of −0.581°. To the authors’ knowledge, the overall performance of PS1, PS2, and PS3 ranks among the best published in the literature for K- and Ka-band four-way power splitters.

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Yo-Sheng Lin www.mdpi.com